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RM0008
Connectivity line devices: reset and clock control (RCC)
Bit 21 I2C1EN : I2C 1 clock enable
Set and cleared by software.
0: I2C 1 clock disabled
1: I2C 1 clock enabled
Bit 20 UART5EN : USART 5 clock enable
Set and cleared by software.
0: USART 5 clock disabled
1: USART 5 clock enabled
Bit 19 UART4EN : USART 4 clock enable
Set and cleared by software.
0: USART 4 clock disabled
1: USART 4 clock enabled
Bit 18 USART3EN : USART 3 clock enable
Set and cleared by software.
0: USART 3 clock disabled
1: USART 3 clock enabled
Bit 17 USART2EN : USART 2 clock enable
Set and cleared by software.
0: USART 2 clock disabled
1: USART 2 clock enabled
Bits 16
Reserved, always read as 0.
Bit 15 SPI3EN : SPI 3 clock enable
Set and cleared by software.
0: SPI 3 clock disabled
1: SPI 3 clock enabled
Bit 14 SPI2EN : SPI 2 clock enable
Set and cleared by software.
0: SPI 2 clock disabled
1: SPI 2 clock enabled
Bits 13:12
Reserved, always read as 0.
Bit 11 WWDGEN : Window watchdog clock enable
Set and cleared by software.
0: Window watchdog clock disabled
1: Window watchdog clock enabled
Bits 10:6 Reserved, always read as 0.
Bit 5 TIM7EN : Timer 7 clock enable
Set and cleared by software.
0: Timer 7 clock disabled
1: Timer 7 clock enabled
Bit 4 TIM6EN : Timer 6 clock enable
Set and cleared by software.
0: Timer 6 clock disabled
1: Timer 6 clock enabled
Doc ID 13902 Rev 9
129/995
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